TDT4255 Computer Design is a thorough review of processor design. We cover various processor implementations ranging from simple single- and multi-cycle processors via a pipelined processor to advanced out-of-order and speculative processors. The students are given hands-on experience of processor design through the exercises. Here, the students design and implement their own processor in an FPGA using VHDL. The teaching language is English.
TDT4255 Computer Design is complementary to TDT4260 Computer Architecture, and following both these courses gives the necessary knowledge to work with both low-level implementation as well as reason about higher level design decisions.
Note: Most of the information for the course will be distributed through these pages, but we will also use it's learning
- 11/09-2013: The semester plan has been updated.
- 06/09-2013: We now have a reference group. If you have suggestions to how the course can become better, contact them or the course staff.
- 25/08-2013: New version of the preliminary lecture plan is available. The delta is an additional 45 min lecture on Chapter 1 Tuesday 3. September 1415-1500 in F3.
- 16/08-2013: The preliminary lecture plan has been published
- 11/07-2013: Web pages are updated. First lecture is Thursday 22. August, 1015, F3
- Tuesdays 1415 - 1600 in F3
- Thursdays 1015 - 1200 in F3
The Thursday slot will predominately be used for normal lectures and the Tuesday slot for exercise lectures. However, there will be exceptions.
The final grade is calculated as follows:
- Final exam (50%)
- Exercise 1 (25%)
- Exercise 2 (25%)
For each exercise, 60% of the marks are awarded based on the delivered report and 40% are based on the quality of the implementation. Quality of implementation covers the design, how well the code is structured, quality of test benches, etc.