Table of Contents

Time Plan - Spring 2017

Lecture Plan

  1. Mon 09/1, Introduction, motivation, practical information. What is computer architecture?
  2. Tue 10/1, Pipelining, instruction level parallelism (ILP)
  3. Mon 16/1, Memory hierarchy, caches, virtual memory
  4. Tue 17/1, Introduction to the exercise, prefetching, (cache optimizations)
  5. Week 4, No lecture (Exercise startup, Tue 24/1)
  6. Mon 30/1, Technology trends
  7. Week 6, No lecture
  8. Mon 13/2, Cache optimizations
  9. Mon 20/2, Instruction level parallelism (ILP)
  10. Tue 21/2, Thread & data level parallelism (TLP & DLP)
  11. Mon 27/2, Graphics proecessing unit (GPU)
  12. Tue 07/3, Performance & Alpha 21164
  13. Mon 13/3, Cache coherency
  14. Tue 14/3, Memory systems
  15. Week 12, No lecture (Midterm Peer review)
  16. Mon 27/3, Interconnects
  17. Tue 28/3, Warehouse scale computing (WSC)
  18. Mon 03/4, Papers: The Future of Microprocessors, Is Dark Silicon Useful?, and On-Chip Interconnection Architecture of the TILE Processor
  19. Week 15, No lecture (Easter)
  20. Week 16, No lecture (Easter)
  21. Mon 24/4, Review

Exercise Plan

  1. Fri 20/1, Organized into groups
  2. Tue 24/1, Exercise startup (Room: EL3)
  3. Wed 15/3, Midterm report deadline
  4. Tue 21/3, Midterm peer evaluation (Room: 454)
  5. Wed 19/4, Final report deadline
  6. Tue 25/4, Final peer evaluation (Room: 454)

Examination

  1. Fri 2/6, 9:00

All the course slides are made available on Itslearning