NTNU Norwegian University of Technology and Science
  Faculty of Information Technology, Mathematics and Electrical Engineering > Department of Computer and Information Science

Diplomas and projects
supervised by Lasse Natvig

Master and PhD theses supervised: (list being updated)

  1. Sindre Magnussen, System Usability of Climbing Mont Blanc - An Online Judge for Energy Efficient Programming (2016)
  2. Christian Chavez, Climbing Mont Blanc and Scalability (2016)
  3. Thea Christine Mathisen, Experiments towards digital exam with auto-grading in C++ programming courses (2016)
  4. Johannes Omberg Lier, Experiments towards digital exam with auto-grading in C++ programming courses (2016)
  5. Benjamin Bjørnseth, (2015)
  6. Mujahed Eleyat, PhD thesis 2014
  7. Matthew Guise, 2014
  8. Bjørn Christian Seime, 2014
  9. Joakim Erik Christopher Anderson, Linux for SHMAC, 2014
  10. Håkon Furre Amundsen, Linux for SHMAC, 2014
  11. Trond Inge Lillesand
  12. Thomas Bølstad Martinsen
  13. Lars-Ivar Hesselberg Simonsen, Increasing SpMV Energy Efficiency Through Compression (Master thesis), 2013
  14. Mads Holden
  15. Hallgeir Lien
  16. Angelo Spalluto
  17. Olav Andreas Fagerlund
  18. Magne Tøndel
  19. Ole Sørli
  20. Martin Tverdal, Operating system directed power reduction on EFM32 (Master thesis), 2010
  21. Ulf Lilleengen
  22. Åsmund Eldhuset
  23. Safurudin Mahic
  24. Marius Grannæs, PhD thesis, 2010
  25. Magnus Jahre, PhD thesis, 2010
  26. Bakke, Glenn Ruben Årthun, Programming Graphic Processing Units (GPUs), 2009
  27. Sigmund Vinsnesbakk, Implementation and testing of shadow tags in the M5 simulator, 2008
  28. Haakon Bertheussen, Improving the Performance of Processor Core Simulation in the M5 Simulator, 2008
  29. Cyril Banino-Rokkones, PhD thesis, 2007
  30. Haakon Dybdahl, PhD thesis, 2007
  31. Magnus Jahre, Improving the Performance of Parallel Applications in Chip Multiprocessors with Architectural Techniques, 2007
  32. Edvard Fielding, Simulation of a multi-core GPU architecture, 2007
  33. Marius Grannæs, Bandwidth-Aware Prefetching in Chip Multiprocessors, 2006
  34. Dagfinn Bakke, NanoRisc C-compiler, 2006
  35. Lande, Arnt Jørgen, Evaluering av Chip Multiprosessor Simulatorer, 2006
  36. Klepaker, Erlend Søreide, BSPlab - experiment manager (BEM), 2006
  37. Tord Andreas Fredriksen, Funksjonsbuffer i maskinvare, Mastergrad i realfag (Informatikk), 2005.
  38. Peder Rand, NanoRisc, (in cooperation with Chipcon AS, Norway), 2005
  39. Nicolai Friis, Computer game based learning - SimComp, 2005
  40. Erik Østby, BSPlab til folket, 2005
  41. Torje Lundereng, BSPlab til folket, 2005
  42. Kai Kristian Amundsen, Java Virtual Machine - Memory-Constrained Copying (in cooperation with Atmel, Norway), 2005
  43. Kristian Skogstrøm, Implementation of Floating-point Coprocessor, 2005
  44. Ola G. Lein, System for overvåking av flyttbart utstyr i bygninger, (i samarbeid med Teknisk Gruppe, IDI), 2005
  45. Kristian Barek, AMBA AHB Test Bench, (in cooperation with Falanx Microsystems), 2005
  46. Pål Anund Sandnes, Rekonfigurerbar digital maskinvare for ultra-bredbånds radar, (I samarbeid med 3D-radar), 2003.
  47. Ove Gram Nipen, Evaluering av scientific Python/BSP på utvalgte parallelle datamaskiner, 2003
  48. Andreas Engh-Halstvedt (in cooperation with Atmel Norway), 2002.
  49. Dag Rognlien, Spesifikasjons-språk for sammensatte HW/SW systemer , 2001
  50. Borgar Ljosland, Design and Implementation of a System for Functional Verification of a Hardware Architecture with Modules Implemented at Different Levels of Abstraction, 2001.
  51. Edvard Sørgård, Design and Implementation of a System for Functional Verification of a Hardware Architecture with Modules Implemented at Different Levels of Abstraction, 2001.
  52. Jørn Nystad, Design and Implementation of a System for Functional Verification of a Hardware Architecture with Modules Implemented at Different Levels of Abstraction, 2001.
  53. Lars Edvard Fodnes, A driver foundation for a hardware 3D-accelerator called Malaik3D, 2001. (Co-supervisor Letizia Jaccheri)
  54. Mario Blazevic, A driver foundation for a hardware 3D-accelerator called Malaik3D, 2001. (Co-supervisor Letizia Jaccheri)
  55. Robin Osa Hoel, System Design of a Baseband and Protocol Processor Supporting the Bluetooth, HomeRF and IEEE 802.11 Wireless Networking Standards in an Integrated Transceiver for the 2.4 GHz IFM-band. (båndlagt tre år), 2001.
  56. Viggo Unneland, Evaluation of High Level Languages, (in cooperation with Atmel Norway), 2001.
  57. Frank Langtind, Media Access Control For Embedded Ethernet Applications, (in cooperation with Atmel Norway), 2001.
  58. Steinar Line, Using BSPlab as a PRAM simulator, 2000.
  59. Christian von Krogh, VEGA - en software simulering av en datamaskin, 1999.
  60. Morten Hartmann, Prototype på hyttevakt, 1999
  61. Rune Nakim, Prototype på hyttevakt, 1999
  62. Thomas Jøndal, Prototype på hyttevakt, 1999.
  63. Ingvar Leikvoll, BSPlab and BSP-parameters, 1999
  64. Åge Stien, Utvikling av testkort for evolusjonær maskinvare, 1999
  65. Svendsen, Svenn-Ivar, Logic Analyzer Implemented With Reconfigurable Hardware, 1999
  66. Kjetil Skjerve, Logic Analyzer Implemented With Reconfigurable Hardware, 1999
  67. Kyrre Sletsjøe, A simple wrist portable data acquisition system with half duplex digital radio interface, 1999
  68. Stein Kjølstad, Using GPS to time tag events in a power distribution network, 1999 (In cooperation with Nortroll, Norway)
  69. Pauline Haddow, PhD thesis, 1998
  70. Ståle Havsgaard Fjeldstad, Design and implementation of a Java environment for the AVR microcontroller, 1998 (In cooperation with Atmel-Norway)
  71. Tor Christian Bekkvik, ClustRa configuration tool, 1998
  72. Renno, Erik Knutsen,Specification and prototype implementation of a high-performance 16-bit microcontroller architecture (in cooperation with Atmel), 1998
  73. Martin Søvik, Hardware/Software cosimulering med Eagle, 1998
  74. Haakon Dybdahl, Simulation of the BSP model on different computer architectures, 1997
  75. Ivan Uthus, Simulation of the BSP model on different computer architectures, 1997
  76. Tore Berg, Evaluation and implementation of algorithms for nice graphs in an orthogonal matrix structure, 1996 (In cooperation with Incatel AS, Sandvika, Norway)
  77. Mushtaq, Muhammed Imran, Communication in Parallel Computers, 1996
  78. Bjarte Walaker, Effective PVM realization on Intel PARAGON, 1995 (In cooperation with Intel Scalable Systems Division, Swindon, UK)
  79. Dag-Frode Rekdal, Hardware with a Procedural Interface, 1995.
  80. Arne Morten Faannessen, Et kompakt integrert navigasjonsinstrument, 1995
  81. Henning Baldersheim, Simulering av heterogene datamaskiner med rekonfigurerbare maskinvare ressurser, 1995.
  82. Ove Kristian Pettersen, Extending the PRAM-pascal compiler to generate code in the PEL-assembly format, 1994
  83. Thor Inge Larsen, Real Time System for Magnetometer, (In cooperation with Nordlysobservatoriet i Tromsø, UiTø), 1994.
  84. Sune Jakobsson, LON fieldbus network card for PC, 1994
  85. Ole Jørgen Lium, Implementing a Loader for the Ethernet board on the RENNS Computer System, 1994.
  86. Ståle Hansen, Introducing a Computer System to the NAF Test Units, 1994
  87. Bent Erik Skaug, Introducing a Computer System to the NAF Test Units, 1994
  88. A. R. Baqui Billah, Execution of PRAM Programs on Bulk Synchronous Parallel Computer Architecture, 1993
  89. Anders Håkon Gaut, High-level simulation of the BSP-architecture, 1994
  90. Fagerland, Ingvar, Software Environment for a Reconfigurable Neural Network Server
  91. Baugstø, Ingvald Rune W, Software Environment for a Reconfigurable Neural Network Server
  92. Bjørn Tore Dale, Compiler for PRAM Pascal designed for execution on a synchronous MIMD computer with shared memory, 1992
  93. Marianne Hagaseth, Polylogarithmic Sorting on the CREW PRAM Model, 1991
  94. Asgeir Langen, Parallelle programmeringsspråk, 1988

One-semester, 4th or 5th year projects: (incomplete list)

  • Haakon Bertheussen, Efficient Processor Core Simulation in M5, 2007
  • Sigmund Vinsnesbakk, Shadow tag based prefetching, 2007
  • Magnus Jahre, Interprocessor Communication in Chip Multiprocessors, 2006.
  • Marius Grannæs, Simulation of Hardware Based Prefetching in SimpleScalar, 2005
  • Arnt Jørgen Lande, Multithreading in Chip Multiprocessors, 2005
  • Peder Rand, 2005
  • Kent Hansen, Evaluating Simics for Research and Educational Purposes, 2004 (In cooperation w/J.O. Hauglid)
  • Nicolai Friis og John Ola Tollefsrud, Dataspillinspirert undervisning, studier og analyse, 2004
  • Sund og Sundsdal, BSPlab til folket, 2004
  • Kai Kristian Amundsen, (in cooperation with Atmel, Norway), 2004
  • Christopher Bakkely, Multichannel 3D-sound On a Portable Platform (In cooperation w/Soundscape Studios AS), 2004
  • Kjetil Aamodt, Prosessering i DRAM, 2004
  • Kristian Skogstrøm, project in TDT4720 Computer Design and Architecture, Specialization, (in cooperation with Atmel, Norway), 2004
  • Olav Gulling og Morten Haugseggen, Synthesis of 32 bit microcontroller, (In cooperation with Nordic Semiconductor), 2004
  • Jørn Nystad & Borgar Ljosland, Design of a VLIW Processor Based on a Subset of the Malaik3D Instruction set in a Hardware Description Language, 2000
  • Bjørn Hanch Sollie, Porting BSPlab to Linux, 2000
  • Eirik Lilleaas, Evaluation of BSPlab, 1998
  • Bjarte Walaker, Porting a PRAM simulator to PVM/PARAGON, 1994
  • Ingebrigt Megård, Simulering av Parallelle Algoritmer på Rekonfigurerbar Maskinvare, 1993
  • A. R. Baqui Billah, Transformation of PRAM Programs for Execution on a BSP Machine, 1993
  • Staal Vinterbo & Kjetil Laugsand, RIPPLE - a High Level Language for RENNS, 1993
  • Stig Hemmer, PRAM Simulator, 1992
  • Bjørn Tore Dale, Parallel Pascal for the Parallel Random Access Machine Model, 1992
  • Asgeir Langen, Simulering av objektflytmaskin, 1988
Editor: Kontorsjef: Eivind Voldhagen  Contact address: Lasse Natvig  Last updated: 01.01.1970