TDT4260 Exercise

The goal of the exercise is twofold:

  1. Learn how to analyze computer architectures through experiments.
  2. Learn how to write a report of your findings as a scientific paper.

For the exercise, we have chosen the hardware prefetcher as the object of study. You will implement one or more prefetchers, test their performance in the M5 simulator and write a scientific report with your findings.

The exercise is to be performed in groups of two and the results are to be documented as a scientific paper of maximum five pages (including necessary references).

Additional information and documentation on the simulator infrastructure can be found on Itslearning.

Storage Size Criteria

Architectural simulators are extremely flexible and, therefore, it is easy to model and simulate something that are not possible to implement or that are impractical because of the required size or slow performance of the modeled technique. It is, therefore, important to always consider and try to evaluate how the thing that is being modeled would be implemented in reality.

For this exercise, we will use the total storage size of the prefetcher as a rough metric for a prefetcher's implementability (this is, of course, a simplification). With storage size, is meant the number of bytes of metadata that are required to be stored for the prefetcher to operate, e.g., the number of entries and size of each entry for a reference prediction table (RPT) prefetcher.

One option is, e.g., to investigate the total size of the L2 and prefetcher by evaluating the tradeoff between the size of the L2 and the prefetcher. The size of the L2 cache can be set by the –l2size= argument (line 36 in An obvious observation to make is to consider if the size of the prefetcher is worth the additional performance benefit that it brings.


The exercise accounts for 20% of the final grade and will be based on your scientific paper. The evaluation of the papers will be done through two peer reviews at which you are expected to contribute.

Prefetcher implementation (50%)

You are supposed to show that you have a clear understanding of how prefetching works and some of its tradeoffs. This should be clear from the contents of the written paper. You may also be asked to provide the implementation.

  • Prefetcher analysis (depth of understanding of the investigated problem)
  • Amount of effort (number/complexity of evaluated prefetching strategies)
  • Prefetcher efficiency
  • (Prefetcher and cache configuration tradeoffs)

Report quality (50%)

  • Clarity of problem statement
  • Overall document structure
  • Language and use of figures/tables


Q: How many prefetchers should we implement?

A: This is entirely up to you. You may focus on one particular algorithm, e.g., extensively explore how some parameters affect performance, but you should at the very least do a comparison with a few other common prefetchers. At the other end of the scale, you can implement many different algorithms and do a more coarse-grained comparison. Again, the choice is entirely up to you.

Q: Do I need to invent my own prefetcher algorithm?

A: No, we do not expect you to invent your own prefetcher as part of the exercise (but you are free to do so if you wish!). It's perfectly fine to use already existing algorithms (perhaps with a twist?)

Q: How well does my prefetcher need to perform to get a good grade?

A: The grade will be based on an overall assessment of your report. We do not expect you to implement a state of the art prefetcher as part of the exercise! Good prefetcher performance is not necessary to obtain a good grade.

2017/03/22 09:23, Magnus Sjalander